signality's Profile


Username	signality
E-mail
Member Since	March 7, 2012

signality's Public Circuits:

Now showing circuits 1-20 of 310. Sort by

	> 2 input logic gates PUBLIC Some ways to make logic gates with more than 2 inputs. by signality \| updated September 20, 2012 n-input-logic-gates
	10% to 90% switched PWM source 01 PUBLIC A way to generate a pulse train so that it's duty cycle switches from D to 1-D. Implemented by scaling, then inverting and level shifting a CLK source set to a duty cycle D, using the USTEP function.... by signality \| updated October 01, 2012 behavioural-source pwm ustep
	2 transistor constant current sink 01 PUBLIC Q2 collector current is held roughly constant over a wide range of V1. Use PNPs for a current source. F5 to simulate. by signality \| updated April 15, 2013 constant-current-sink constant-current-source
	2zeroXornot2zeroX PUBLIC An illustration of the difference between switching an inductive load at zero crossing (zero degrees) and at peak voltage (90 degrees) by signality \| updated March 13, 2012 inductive-load zero-voltage-switching
	3 inverter oscillator 01 PUBLIC A 3 inverter oscillator. From Figure 2 of: Application Note 118 CMOS Oscillators www.fairchildsemi.com/an/AN/AN-118.pdf Simulate > Time Domain > Run Time Domain Simulation by signality \| updated June 22, 2012 3-inverter-oscillator logic-gate-oscillator oscillator three-inverter-oscillator
	3 phase 01 PUBLIC A demonstration of single phase and 3 phase, Star and Delta connected, mains. Simulate > Time Domain > Run Time-Domain Simulation by signality \| updated July 24, 2012 3-phase single-phase
	3 phase alternator / generator polarisation 01 PUBLIC The rotor on active, or powered, rotor alternators must be "polarised" - that is, given a small remnant magnetic polarisation - before it can be used for the first time. This describes a way to do it. by signality \| updated April 26, 2013 3-phase alternator generator polarisation polarization
	3dB down line PUBLIC by signality \| updated January 14, 2014
	3X Op-amp 02 PUBLIC by signality \| updated June 20, 2012
	4:1 MUX PUBLIC A 4:1 single bit logic multiplexer by signality \| updated February 27, 2013 4-1-mux logic-multiplexer mux
	555 LDR delay timer PUBLIC LDR controller motor drive with turn on delay by signality \| updated October 15, 2013 555 ldr monostable photoresistor schmitt-trigger
	555 Timer as Astable Multivibrator (Oscillator) model error PUBLIC UPDATE: For a while, around 130723, the CL 555 timer model appeared to now operate correctly but as at 131202, it is broken again as described below. The high level voltage at the OUTPUT pin of the CL... by signality \| updated December 02, 2013 555 astable multivibrator timer
	6-8 VLamp Soft Start 01 PUBLIC Simple incandescent lamp soft start. by signality \| updated May 01, 2012
	AC analysis with multiple sources PUBLIC A demonstration of how to run an AC analysis of a circuit with two AC sources. by signality \| updated August 25, 2012 ac-analysis frequency-domain multiple-ac-sources
	AC circuit example workaround for CL 01 PUBLIC UPDATE: CL have now fixed this type of problem so this workaround is now superceded: see:... by signality \| updated January 07, 2013 bode-plot multiple-ac-sources
	AC inductor current 02 PUBLIC by signality \| updated March 24, 2013
	AC into RC circuit 01 PUBLIC by signality \| updated April 15, 2012
	amplitude modulation 01 PUBLIC The equivalence of amplitude modulation created by multiplying a carrier by a modulator and by summing sum and difference frequencies with the correct +/-90 degree phase relationships. Simulate > Time... by signality \| updated October 30, 2012 amplitude-modulation sidebands sum-and-difference
	amplitude modulation 02 PUBLIC Deconstructing amplitude modulation. Simulate > Time Domain > Run Time-Domain Simulation by signality \| updated October 30, 2012 amplitude-modulation carrier lower-sideband lsb upper-sideband usb
	astable flip flop 02 PUBLIC The classic 2 transistor astable multivibrator with and without anti-saturation clamps. by signality \| updated April 23, 2012 astable initial-conditions startup

	> 2 input logic gates PUBLIC Some ways to make logic gates with more than 2 inputs. by signality \| updated September 20, 2012 n-input-logic-gates
	10% to 90% switched PWM source 01 PUBLIC A way to generate a pulse train so that it's duty cycle switches from D to 1-D. Implemented by scaling, then inverting and level shifting a CLK source set to a duty cycle D, using the USTEP function.... by signality \| updated October 01, 2012 behavioural-source pwm ustep
	2 transistor constant current sink 01 PUBLIC Q2 collector current is held roughly constant over a wide range of V1. Use PNPs for a current source. F5 to simulate. by signality \| updated April 15, 2013 constant-current-sink constant-current-source
	2zeroXornot2zeroX PUBLIC An illustration of the difference between switching an inductive load at zero crossing (zero degrees) and at peak voltage (90 degrees) by signality \| updated March 13, 2012 inductive-load zero-voltage-switching
	3 inverter oscillator 01 PUBLIC A 3 inverter oscillator. From Figure 2 of: Application Note 118 CMOS Oscillators www.fairchildsemi.com/an/AN/AN-118.pdf Simulate > Time Domain > Run Time Domain Simulation by signality \| updated June 22, 2012 3-inverter-oscillator logic-gate-oscillator oscillator three-inverter-oscillator
	3 phase 01 PUBLIC A demonstration of single phase and 3 phase, Star and Delta connected, mains. Simulate > Time Domain > Run Time-Domain Simulation by signality \| updated July 24, 2012 3-phase single-phase
	3 phase alternator / generator polarisation 01 PUBLIC The rotor on active, or powered, rotor alternators must be "polarised" - that is, given a small remnant magnetic polarisation - before it can be used for the first time. This describes a way to do it. by signality \| updated April 26, 2013 3-phase alternator generator polarisation polarization
	3dB down line PUBLIC by signality \| updated January 14, 2014
	3X Op-amp 02 PUBLIC by signality \| updated June 20, 2012
	4:1 MUX PUBLIC A 4:1 single bit logic multiplexer by signality \| updated February 27, 2013 4-1-mux logic-multiplexer mux
	555 LDR delay timer PUBLIC LDR controller motor drive with turn on delay by signality \| updated October 15, 2013 555 ldr monostable photoresistor schmitt-trigger
	555 Timer as Astable Multivibrator (Oscillator) model error PUBLIC UPDATE: For a while, around 130723, the CL 555 timer model appeared to now operate correctly but as at 131202, it is broken again as described below. The high level voltage at the OUTPUT pin of the CL... by signality \| updated December 02, 2013 555 astable multivibrator timer
	6-8 VLamp Soft Start 01 PUBLIC Simple incandescent lamp soft start. by signality \| updated May 01, 2012
	AC analysis with multiple sources PUBLIC A demonstration of how to run an AC analysis of a circuit with two AC sources. by signality \| updated August 25, 2012 ac-analysis frequency-domain multiple-ac-sources
	AC circuit example workaround for CL 01 PUBLIC UPDATE: CL have now fixed this type of problem so this workaround is now superceded: see:... by signality \| updated January 07, 2013 bode-plot multiple-ac-sources
	AC inductor current 02 PUBLIC by signality \| updated March 24, 2013
	AC into RC circuit 01 PUBLIC by signality \| updated April 15, 2012
	amplitude modulation 01 PUBLIC The equivalence of amplitude modulation created by multiplying a carrier by a modulator and by summing sum and difference frequencies with the correct +/-90 degree phase relationships. Simulate > Time... by signality \| updated October 30, 2012 amplitude-modulation sidebands sum-and-difference
	amplitude modulation 02 PUBLIC Deconstructing amplitude modulation. Simulate > Time Domain > Run Time-Domain Simulation by signality \| updated October 30, 2012 amplitude-modulation carrier lower-sideband lsb upper-sideband usb
	astable flip flop 02 PUBLIC The classic 2 transistor astable multivibrator with and without anti-saturation clamps. by signality \| updated April 23, 2012 astable initial-conditions startup

signality's Public Circuits:

> 2 input logic gates PUBLIC

10% to 90% switched PWM source 01 PUBLIC

2 transistor constant current sink 01 PUBLIC

2zeroXornot2zeroX PUBLIC

3 inverter oscillator 01 PUBLIC

3 phase 01 PUBLIC

3 phase alternator / generator polarisation 01 PUBLIC

3dB down line PUBLIC

3X Op-amp 02 PUBLIC

4:1 MUX PUBLIC

555 LDR delay timer PUBLIC

555 Timer as Astable Multivibrator (Oscillator) model error PUBLIC

6-8 VLamp Soft Start 01 PUBLIC

AC analysis with multiple sources PUBLIC

AC circuit example workaround for CL 01 PUBLIC

AC inductor current 02 PUBLIC

AC into RC circuit 01 PUBLIC

amplitude modulation 01 PUBLIC

amplitude modulation 02 PUBLIC

astable flip flop 02 PUBLIC