Sine wave is 9V above expecited

Hello everyone, I am doing a simulation on Circuit Lab, and its the sine wave starts at 9 instead of 0V in the timestamp simulation, even though I used the exact same circuit on LTspice and Multisim and I didn't have that problem. when I hover over the Output capacitor it says 0 V. And I also encountered the exact same problem on Qspice. any suggestions? Thank you

by maly53
March 04, 2024

You are using a 10khz signal source so one cycle takes 1/10 or 0,1 millisecond. Your time step is 1ms so 10 cycles go by between calculations--a sure way to get nonsense from your simulation. I'm not saying this is the only problem but fix it up and you may start getting something comprehensible

by Foxx
March 05, 2024

hey thank you for the reply, I don't know why it didn't save my latest circuit. I did fix the timestamp its from 0 to 1ms every 1us per step. My issue is that the signal base line is aorund 9V instead of 0V. it seems like C3 isn't working as intended for some reason. And as I said before this issue didn't show on the other 2 simulation programs. @Foxx

by maly53
March 06, 2024

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