Please add an asynchronous clear input to the library D Flip-flop

All of the existing digital primitives are either purely clocked, or purely asynchronous. But many common real-life components are hybrids that have asynchronous inputs to clear or set ('precharge') them to a particular state.

Please consider adding, at a minimum, a D flip-flop with an active-low async set and clear.

In the meantime, folks who really need one are welcome to use this:

With a single digital primitive that mixes sync and async operation, users can cobble together other hybrids as needed. Without it, we are forced to build these things at the gate level, gobbling up real estate and distracting from the design task.

Thanks!

by jvmatl
January 10, 2013

I agree this should be in circuitlab. The OP is correct that this is a very common real-world circuit element.

by avsteele
June 12, 2024

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