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What will the outputs be over time for the name mode; output, if you feed triangular wave AC into the name mode; Grid tie 1 connections,?

This is the circuit; https://www.circuitlab.com/circuit/q23bv26qmcs5/grid-tie-part-2/

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I did now.

Some of your diodes and some of your IC would burn out due to an excess of current (your source of current of 1 A is just too big).

The logical level 1 and 0 (and invalid zone) depends on the technology used. Furthermore, not all IC guaranteed the output when one of the input is in the invalid zone. Some IC may keep the same output established when the two inputs were in a valid state, but that is not necessary true for all IC. Using a triangular signal, you may assume that there will be in the invalid zone for some inputs.

When you use feed back (such as XOR2 which feeds OR1 which feeds XOR1 feeding OR2 feeding XOR2; so XOR2 output depends on itself) the technology and the delays of propagation have to be known for each gate in order to know if you cycle, latch, are in a race condition, or are in a stable condition. Not to mention the initialisation of the whole circuit.

It is quite unrealistic to predict any output, given that the physical model adds capacitances and inductances in the montage which can influence the outputs.

So basically if I can implement it in real life and test it would be the only way right? Yeah how the output determines some of the inputs and actions, that is the one thing I hate about digital electronics so far. And what about square wave input?

In theory it will be more predictable. There is still a problem of initialisation, since some capacitance may be left charged differently from a previous run, from run to run, and may increase the possibility of a latch (memory) effect or the result of a race conclusion. When the frequency of the square wave will approach the time of propagation of the signal through the slowest gate, you would also enter in the lands of chaos (an effect that you didn't consider in your analysis starts to reduce the horizon of predictability). In fact, you can experiment the same behavior with simple flip-flog where some input combinations are ... "illegal" (the output is not defined). A clever design alleviates these effects. In your case, I would consider using an MCU: the software is generally easier to patch, isn't it.

What exactly does and mcu do? And if I could slow down the ac ossilation could it help prevent the latch effect and/or more problems?

An MCU, a micro controller unit, like an Arduino, an ESP32, an MSPxxx (from TI), etc. is a kind of a computer on a chip (without keyboard, mouse, and monitor) which has many inputs (digital or analog) which may be treated through software and re-emitted as outputs. As example, two binary inputs can be treated as a table of 2x2 with an output accordingly to each of the four possible cases from the inputs. If you need to take in account the actual state of an output, that is an additional x2 in the table. Or you can use if-then-else, switch/case, or any other software construction... even artificial intelligence if you feel it could help.

As for all hardware solution, to minimize race conditions and undetermined problem of synchronisation, it is common to use an external clock and enable an operation only on a clock front (raising or falling), allowing synchronisation and even taking the timing into account. Things that many integrated circuits already implement, built in, so that you just must include the external "clock" signal.

Could I connect the mcu properly and it could do the same as those xors and ors?

Sure, by software. You can either loop ad nauseam poking the "inputs", or just ask an interruption/notification only when one of the inputs change its value. The logical operation or, and, not, nand, nor, xor, .... exist in software.

I know but I meant in the exact arrangment I have.

If the MCU has at least 31 GPIO pins, yes. As for the predictability of the results, still not obvious since outputs are badly coupled, indirectly, with their inputs, and so, their stability, through time, is not improved.

On the other hand, it is easier to describe what you want to do with an algorithm (in software) that with a strange unreliable hardware suspicious arrangement.

I simmed my circuit it gives square wave.

Isn't it exactly what the input is?

No the input is sine wave.

Demonstration of the importance of the propagation delay.

With many stages of logic gates, the EXACT technology and time of propagation through each gate MATTERS in order to predict the output, as much as the initial values at each gate when powering up the system (through pull-up or pull-down resistor, if required) when there are loops.

I am using an mcu for this soon, because the gates are all the same in theory anyway they are exact in the sim. Also I am hoping an mcu will keep the output constant.