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I wanted to understand the 74LS00 in terms of transistors, in order to figure out: why when the input pins aren't connected to anything they have a logic value of 1. Searching online I wasn't able to find the actual circuit with the transistors that is used in each NAND gate in the IC. I would appreciate it if someone could provide me with the transistor diagram of the 74LS00 in order to explain the no input counting as value 1. Thank you in advance. |
November 20, 2021 |
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From ti 74LS00 datasheet , page 10, table 1, for an unconnected input pin, it is only if the other input pin of the gate is at a low level that you are guaranteed for an output at a level high. Indeed, if any of the input is low, the AND evaluates to FALSE and so, the NAND, to TRUE (independently of the value at the other input pin of the gate). |
by vanderghast November 22, 2021 |
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For the typical TTL circuit, with BJT, it is generally strongly inspired from TTL NAND . The TOTEM part, at the right, insures us to deliver a fast-switching state compatible with the TTL logical levels. The middle part makes us sure that no more than only one of the two BJT of the TOTEM part is turned on. You can have a very good intro about that circuit, with explanations and analog computations at Digital Electronics, by William Kleitz (free pff) page 406. |
November 22, 2021 |
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