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I'm looking for a way to set the initial charge on a reservoir cap to 0V at the beginning of a simulation, where a voltage source is already connected via passive components (like a charging resistor for example). This can often be achieved via an IC node hint in other Spice systems. Any chance of making this available, or is there a preferred way in Circuitlab, e.g. with timed/pulsed voltage sources?

We currently don't have initial condition hints, but the same effect can be achieved using a time-controlled switch switching at t=0 like this: Try running the time-domain simulations for this one and I think you'll see the desired effect.

Is this still the only method of setting an initial condition?

@Eric_D,

A search through CL for:

initial conditions

startup

and

initial condition capacitor

will show some ways of doing things like this but as far as I know there are no techniques such as the spice .IC statement available in CL yet.

:)

Thanks. I put the switches across the caps (in my circuit) and now it's running transient correctly. Funny how I learned this old trick back in 1982 running SPICE 2.G on a Vax PDP 11/34 in Fortran.