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What's the difference between the characteristics of a PNP and NPN transistor in the Common base, emitter, and collector configuration?

Most often, we use a PNP when the transistor is between the power source, V_CC, and the "load" which is said to be on "the low side", since the load is between the "switch" (the PNP) and the ground.

For a NPN, the load is on the "high side": the load is between the power source, V_CC, and the transistor, while the transistor is between the load and the ground.

If you consider that, for the forward active mode of a NPN, V_BE >= V_{BE_ON}, and V_CE >= V_BE, putting SOME load on the low side means that V_E increases, and so, V_B has to increase too. While we generally have V_B quite low, in voltage, that is counter productive to put that load on the low side, with a NPN.

Similar considerations would lead to why with a PNP, the load is generally on the low side and not so often a (large) load is used on the high side for a PNP.

Note: for a NPN, V_BE >= V_{BE_ON} is required to have the NPN in a NOT-BLOCKING mode while V_CE >= V_BE is required to have the NPN in ACTIVE mode, not in saturation. If you use the NPN as a switch, you may have a benefit to drop that last condition in order to decrease V_CE, leading in less power lost (to be dissipated) through the transistor.

Note that the rule to use an NPN with a "high load" is not an absolute. It is mostly true for a switch where the command comes from a micro-controler, as example.

But a good example where that rule is not to be followed is given by the emiter-follower (or common collector if you prefer).