inverting schmitt trigger logic gate PUBLIC

A behavioural model of an inverting schmitt trigger logic gate with user adjustable threshold and hysteresis.

Although all logic gates in CircuitLab have hysteresis on their inputs, it does not yet expose the hysteresis parameters for user adjustment. This circuit shows a way to use the voltage controlled switch and a logic buffer to make a simple behavioural model of an inverting schmitt trigger logic gate. The threshold and hysteresis levels are set by the Voltage controlled Switch, SW1. The propagation delay and output swing characteristics are set by the BUF1 gate. The 5V supply is purely internal to the model and is not intended to be used externally or to represent the supply to BUF1. SW2 switches from digital to analogue signal source at T=2us Simulate > Time Domain > Run Time-Domain Simulation