multiple decoupling capacitors 01 PUBLIC

An example of what happens when decoupling capacitors
are put in parallel.

SImulate > Frequency Domain > Run Frequency-Domain Simulation

Note that an LTspice simulation can be downloaded in:

multiple_caps_in_parallel_01.zip

from:

https://docs.google.com/folder/d/0B2wonnsWWfTXOTVmNDU2Y2MtYzJlZi00M2MyLWExZDAtM2JhY2NiNGI4ODBi/edit

An example of what happens when decoupling capacitors are put in parallel.

Current source I1, resistor Rsource1 and inductor Lsource1 set up a simple Norton equivalent circuit signal source. Rsource1 and Lsource1 can be varied to see the effect of different source impedances.

Voltage source V1 is set to 0V, 1V or 2V to select which capacitors are placed in the circuit using the voltage controlled switches SW1 and SW2..

It can be seen that whilst multiple capacitors in parallel can reduce the overall impedance above the lowest self resonance (usually set by the largest value capacitor), they also set up multiple higher impedance resonances which can produce unexpected effects. These resonances are across the different capacitors, C1, C2 & C3 and effective series inductances Lesl1, Lesl2 & Lesl3.

For a given package size and dielectric type and voltage rating, capacitor esl is roughly constant. Hence, if you have capacitors in similar sized packages, especially if they are surface mount parts of the same dielectric type, it is often safer in terms of avoiding unwanted resonance effects to use a single decoupling capacitor with the highest capacitance value you can fit into a given package.

Note that except for very high specification RF and microwave parts, parameters such as ESR and ESL are poorly specified so using them for example to try to null noise due to clock frequencies is inadvisable because the results may vary widely from one part to another.

More information can be found in the following links.

http://hsi.web.cern.ch/HSI/s-link/devices/g-ldc/decouple.pdf

http://user.chol.com/~waveline/Seminar/RF_Design/Capacitors/Effectiveness%20of%20Multiple%20Decoupling%20Capacitors.pdf

http://www.intersil.com/content/dam/Intersil/documents/an13/an1325.pdf

and a very detailed examination:

http://www.ewh.ieee.org/r4/se_michigan/emcs/DL-ARCH-decoupling3.pdf

plus more links from:

http://en.wikipedia.org/wiki/Decoupling_capacitor

The Murata tools from here are very useful:

http://www.murata.com/products/design_support/mcsil/index.html

http://ds.murata.co.jp/software/simsurfing/en-us/index.html

and similar from AVX:

http://www.avx.com/SpiApps/default.asp#spimic

SImulate > Frequency Domain > Run Frequency-Domain Simulation