|
Can you help me what "one frame delay" means in a practical digital control logic circuit? Thank you |
December 31, 2018 |
|
If you want to send parallel data down a serial link, then you must first convert a chunk of parallel data to serial (using a PISO register). Each chunk of serial data is a frame, usually with start and end data added. Successive chunks of serial data are known as frames, and follow each other down the serial line. The time interval between one starting and the next starting is one frame delay. At the receiving end the serial data is converted back to parallel in a SIPO register which is synchronised by the frame start and stop data. |
by mikerogerswsm December 31, 2018 |
|
Thank you and happy New Year mikerogerswsm.! |
December 31, 2018 |
You must log in or create an account (free!) to answer a question.
Anyone can ask a question.
Did you already search (see above) to see if a similar question has already been answered? If you can't find the answer, you may ask a question.
CircuitLab's Q&A site is a FREE questions and answers forum for electronics and electrical engineering students, hobbyists, and professionals.
We encourage you to use our built-in schematic & simulation software to add more detail to your questions and answers.
Acceptable Questions:
Unacceptable Questions:
Please respect that there are both seasoned experts and total newbies here: please be nice, be constructive, and be specific!
CircuitLab is an in-browser schematic capture and circuit simulation software tool to help you rapidly design and analyze analog and digital electronics systems.