Does an IC draws current from VRM based on its clock frequency. SOLVED

Does IC draws current from PCB Power rail based on clock frequency of IC. I mean it can store in a capacitor and use it whenever needed. Does any one know the answer. Please let me know

by Vamsi_ap
May 24, 2017

Sorry, I am a Beginner and my apologies if this is a very basic question

by Vamsi_ap
May 24, 2017

1 Answer

Answer by mrobbins

Thanks for posting! Your question is a little confusing, but it seems to have two parts:

First, yes, most CMOS-based digital logic will consume very little (near zero) instantaneous power when settled, and relatively higher instantaneous power when the clock triggers, because a number of gates must potentially change states.

Changing states causes currents to flow in order to charge or discharge the corresponding capacitances within the circuit. In contrast, maintaining state in any CMOS digital logic takes essentially no current, because there is tiny leakage and one of the complementary transistors will always be off. (However, in big processors, these tiny gate leakage currents can add up!)

Check out this simulation:

Click the circuit, click "Simulate", then "Run Time-Domain Simulation." You'll see that the current spike is huge when the CMOS NAND gate is switching states.

Second, yes, it is possible to use a capacitor as a power source for digital logic. Almost all designs include a capacitor across the power rails in close physical proximity to the digital logic ICs. This temporarily acts as a low-impedance power source during the very clock events you've mentioned, because any battery or wall power supply will have greater inductance or even physical speed-of-light distance over the timescales of interest during a clock transition.

ACCEPTED +1 vote
by mrobbins
May 24, 2017

Thank you very much for your comment. I should have explained more, but in a way your answer was helpful. Let me explain more details.

I am coming more from Power Integrity stand point of view. When we do power integrity we will be concerned about harmonics and we perform resonance analysis. My question is that most of the power is DC in nature in PCB. So my understanding is that harmonics only come in to picture if the IC power pin or the IC is not drawing current in continuous fashion rather it draws current based on requirements of clock transition (i.e switching gates on and off). If my understanding is correct, then a follow-up question is capacitors in the chip should handle this situation by storing the current. Are the not capable of storing current enough without the need to draw variable current from the VRM?. Hope it makes more sense now and thanks again for your kind understanding.

by Vamsi_ap
May 25, 2017

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