RLC @ DC PUBLIC

This circuit show the steady-state of RL, RC and RLC at power on and off.

Dimensioning of RL, RC and RLC let the components get saturated in under a second. The power on and off behavior is achieved by a time controlled switch, which off time is set to one second, so that the relevant components are saturated. Therefor the time domain simulation is set to stop at two seconds in order to show the discharge of the components. Furthermore a frequency domain simulation can be used to show frequency behavior. RC forms low-pass, RL high-pass and RLC band-pass filter.