|Created||October 28, 2011|
|Last modified||November 01, 2011|
|Tags||amplifier bjt cascode|
Q1 and Q2 are the main amplification. The four PNP BJTs provide a cascoded current mirror for super high gain active load.
I1 is set to be 20uA so that each half of the differential pair gets 10uA.
At low frequencies, this amplifier has a gain of almost 70dB -- roughly a factor of 3000x on the input signal!
Try changing the current value I1 over a few orders of magnitude. Then run the Bode plot. Look at how the -3dB point (well, really it's around +66dB gain) moves.
Try looking at the DC simulation solution and seeing how the current splits between the two halves of the amplifier.
Next, look at the DC Sweep simulation for output V(out1). This shows how linear (or not) the amplifier is for a large signal input.
Run the time domain simulation and plot V(out1_AC). The VCVS and R4/C1 just help us "scale" things properly for the graph, so the output is plotted centered around zero instead of its actual DC bias value. Try this for a bunch of different values of V2 magnitudes -- say, 100u, 1m, and 2m. At 2m, you'll very clearly see saturation / distortion.
Finally, use the Bode simulation tool, plotting either V(out1) or V(out1_AC). (Those two will be virtally identical because the R4*C1 time constant is chosen to be so low slow.) Look at the tremendous gain of this amplifier. Notice the -3dB point of the magnitude plot? You can move it by changing the amplifier bias current I1 over many orders of magnitude. Try I1 = 2u, 20u, 200u, 2m, 20m and notice that the -3dB frequency goes up by rougly a factor of 10 each time the bias current goes up by a factor of 10! You're witnessing the tradeoff between power and bandwidth. But now try another step, I1 = 200m, and you'll see we quickly hit a wall where something else is limiting the circuit bandwidth -- the bandwidth is barely higher than it was for 20mA bias current.
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