|Created||November 13, 2011|
|Last modified||May 17, 2012|
|Tags||digital mosfet pull-up|
Two n-channel MOSFETs plus one pull-up resistor form a two-input NAND logic gate.
When both A and B are high, the output voltage is pulled low. Otherwise, the output voltage is high.
Load the simulation by clicking "Open in editor" above, and then click "Simulate" at the bottom. Run a time domain simulation.
Plot A, B, and out versus time. You should verify that the logic performs the correct operation.
How much current is consumed when the output is in the low state?
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